3D NAND Flash Memory - Electrical and Physical characterizations for Memory Cell Reliability
Presenter: |
Yuichiro Mitani |
Toshiba Memory |
Start: |
10:20 (60 minutes) |
Abstract
As conventional planer NAND flash memories are limited from physical and electrical
scaling point of view, the three-dimensional NAND (3D-NAND) flash memories, in which memory cells are stacked vertically, has rapidly achieved maturity to keep a trend of increasing bit density and reducing bit cost. To realize more capacity, total number of layers are increasing (>64 layers) and multi-level cell (MLC) operations are indispensable (>3bit/cell). Extending this capacity trend requires highly-reliable memory cell. This talk will focus on the typical charge-trap type memory cell, and the electrical and physical characterization of tunnel oxide, charge trap film, and poly-Si channel will discuss from the viewpoint of understanding reliability mechanisms.
Biography
As conventional planer NAND flash memories are limited from physical and electrical
scaling point of view, the three-dimensional NAND (3D-NAND) flash memories, in which memory cells are stacked vertically, has rapidly achieved maturity to keep a trend of increasing bit density and reducing bit cost. To realize more capacity, total number of layers are increasing (>64 layers) and multi-level cell (MLC) operations are indispensable (>3bit/cell). Extending this capacity trend requires highly-reliable memory cell. This talk will focus on the typical charge-trap type memory cell, and the electrical and physical characterization of tunnel oxide, charge trap film, and poly-Si channel will discuss from the viewpoint of understanding reliability mechanisms.